Version 9.2 Release Notes

The following lists the changes to SIMetrix and SIMetrix/SIMPLIS for the Version 9.2 release.

User Interface

Netlist to schematic converter
Schematic highlight enhancements: module ports, terminals and ground symbols connected to highlighted nets are now also highlighted
Arbitrary probe supports noise analysis
New Script functions:
- CleanPath(). Cleans a file path
- CollateNested(). Collates nested multi-division data to reduce number of dimensions by 1
- FilterNested(). Extracts a range of divisions from a multi-division vector according to nesting levels
- Jitter(). Calculates clock jitter
- MaxN(). Returns maximum of up to 32 vectors
- MinN(). Returns minimum of up to 32 vectors
- NetToCirc(). Convert a netlist to a schematic
- RMS1_AC(). Calculates RMS after extracting DC component
- Spectrum(). Calculates FFT Spectrum. Previously a script-defined function, now built-in
- StripRef(). Removes the X-values from input data

Multi-level Multi-step analysis
PSpice compatibility features: .STEP and .PROBE
.VECALIAS statement creates alias vector
Current controlled switch device added
delay() function added to arbitrary source. (Compatible with LTspice)
K devices with 3 or more linked inductors
New fast iteration mode speeds up simulation of large passive interconnect systems
High and Low resistance parameters for Verilog-HDL devices
.FILE/.ENDF supports encryption for arbitary logic blocks, digital state machines, digital sources and PWLFILE definitions
log() function used in arbitrary sources and .PARAM statements changed to mean log to base e for compatibility with publicly available models. (Unchanged in script code and .VAR statements where it still means log to base 10)
Transient snapshot feature now available with Classic versions

Click here for list of bug fixes for 9.2. Requires username and password. Enter credentials for downloading SIMetrix (version 7.2 or later)